vishay siliconix si2333ds document number: 72023 s09-0130-rev. c, 02-feb-09 www.vishay.com 1 p-channel 12-v (d-s) mosfet features ? halogen-free according to iec 61249-2-21 available ? trenchfet ? power mosfet applications ? load switch ? pa switch notes: a. surface mounted on 1" x 1" fr4 board. b. pulse width limited by ma ximum junction temperature. product summary v ds (v) r ds(on) ( )i d (a) - 12 0.032 at v gs = - 4.5 v - 5.3 0.042 at v gs = - 2.5 v - 4.6 0.059 at v gs = - 1.8 v - 3.9 g s d top view 2 3 to-236 (sot-23) 1 si2333ds (e3)* * marking code ordering information: SI2333DS-T1-E3 (lead (pb)-free) si2333ds-t1-ge3 (lead (pb)-free and halogen-free) absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol 5 s steady state unit drain-source voltage v ds - 12 v gate-source voltage v gs 8 continuous drain current (t j = 150 c) a, b t a = 25 c i d - 5.3 - 4.1 a t a = 70 c - 4.2 - 3.3 pulsed drain current i dm - 20 continuous source current (diode conduction) a, b i s - 1.0 - 0.6 maximum power dissipation a, b t a = 25 c p d 1.25 0.75 w t a = 70 c 0.8 0.48 operating junction and storage temperature range t j , t stg - 55 to 150 c thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient a t 5 s r thja 75 100 c/w steady state 120 166 maximum junction-to-foot (drain) steady state r thjf 40 50
www.vishay.com 2 document number: 72023 s09-0130-rev. c, 02-feb-09 vishay siliconix si2333ds notes: a. pulse test: pw 300 s, duty cycle 2 %. b. for design aid only, not subject to production testing. c. switching time is essentially independent of operating temperature. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications t j = 25 c, unless otherwise noted parameter symbol test conditions limits unit min. typ. max. static drain-source breakdown voltage v (br)dss v gs = 0 v, i d = - 250 a - 12 v gate-threshold voltage v gs(th) v ds = v gs , i d = - 250 a - 0.40 - 1.0 gate-body leakage i gss v ds = 0 v, v gs = 8 v 100 na zero gate voltage drain current i dss v ds = - 9.6 v, v gs = 0 v - 1 a v ds = - 9.6 v, v gs = 0 v, t j = 55 c - 10 on-state drain current a i d(on) v ds - 5 v, v gs = - 4.5 v - 20 a drain-source on-resistance a r ds(on) v gs = - 4.5 v, i d = - 5.3 a 0.025 0.032 v gs = - 2.5 v, i d = - 4.6 a 0.033 0.042 v gs = - 1.8 v, i d = - 2.0 a 0.046 0.059 forward transconductance a g fs v ds = - 5 v, i d = - 5.3 a 17 s diode forward voltage v sd i s = - 1.0 a, v gs = 0 v - 0.7 - 1.2 v dynamic b total gate charge q g v ds = - 6 v, v gs = - 4.5 v i d ? - 5.3 a 11.5 18 nc gate-source charge q gs 1.5 gate-drain charge q gd 3.2 input capacitance c iss v ds = - 6 v, v gs = 0 v, f = 1 mhz 1100 pf output capacitance c oss 390 reverse transfer capacitance c rss 300 switching c tu r n - o n t i m e t d(on) v dd = - 6 v, r l = 6 i d ? - 1.0 a, v gen = - 4.5 v r g = 6 25 40 ns t r 45 70 turn-off time t d(off) 72 110 t f 60 90
document number: 72023 s09-0130-rev. c, 02-feb-09 www.vishay.com 3 vishay siliconix si2333ds typical characteristics 25 c, unless otherwise noted output characteristics on-resistance vs. drain current gate charge 0 4 8 12 16 20 012345 v gs = 5 v thru 2.5 v 1 v 1.5 v 2 v i d - drain current (a) v ds - drain-to-source voltage (v ) 0.00 0.03 0.06 0.09 0.12 0.15 048121620 v gs = 4.5 v v gs = 2.5 v v gs = 1.8 v i d - drain current (a) - on-resistance ( ) r ds(on) 0 1 2 3 4 5 03691215 v ds = 6 v i d = 5.3 a v gs - gate-to-source voltage (v) q g - total gate charge (nc) transfer characteristics capacitance on-resistance vs. junction temperature 0 4 8 12 16 20 0.0 0.5 1.0 1.5 2.0 2.5 25 c 125 c t c = - 55 c i d - drain current (a) v gs - gate-to-source voltage (v) 0 300 600 900 1200 1500 1800 036912 c rss c oss c iss c - capacitance (pf) v ds - drain-to-source voltage (v) 0.8 0.9 1.0 1.1 1.2 1.3 1.4 - 50 - 25 0 25 50 75 100 125 150 v gs = 4.5 v i d = 5.3 a r ds(on) - on-resistance (normalized) t j - junction temperature (c)
www.vishay.com 4 document number: 72023 s09-0130-rev. c, 02-feb-09 vishay siliconix si2333ds typical characteristics 25 c, unless otherwise noted source-drain diode forward voltage threshold voltage 1.0 1.2 0.1 10 20 0.0 0.2 0.4 0.6 0.8 t j = 150 c 1 t j = 25 c i s - source current (a) v sd - source-to-drain voltage (v) - 0.2 - 0.1 0.0 0.1 0.2 0.3 0.4 - 50 - 25 0 25 50 75 100 125 150 i d = 140 a variance (v) v gs(th) t j - temperature (c) on-resistance vs. gate-to-source voltage single pulse power 0.00 0.03 0.06 0.09 0.12 0.15 012345 i d = 5.3 a i d = 2 a v gs - gate-to-source voltage (v) - on-resistance ( ) r ds(on) 0.01 0 1 6 12 2 4 10 600 0.1 power (w) time (s) 8 10 100 t a = 25 c safe operating area 100 1 0.1 1 10 100 0.01 10 t a = 25 c single pulse p(t) = 10 dc 0.1 i d(on) limited limited by r ds(on)* bvdss limited p(t) = 1 p(t) = 0.1 p(t) = 0.01 p(t) = 0.001 p(t) = 0.0001 i d - drain current (a) v ds - drain-to-source voltage (v ) * v gs > minimum v gs at which r ds(on) is specified i dm limited
document number: 72023 s09-0130-rev. c, 02-feb-09 www.vishay.com 5 vishay siliconix si2333ds typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72023 . normalized thermal transient impedance, junction-to-ambient square wave pulse duration (s) normalized effective transient thermal impedance 2 1 0.1 0.01 10 -3 10 -2 1 10 600 10 -1 10 -4 duty cycle = 0.5 0.2 0.1 0.05 0.02 single pulse 100 1. duty cycle, d = 2. per unit base = r thja = 120 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm
vishay siliconix package information document number: 71196 09-jul-01 www.vishay.com 1 sot-23 (to-236): 3-lead b e e 1 1 3 2 s e e 1 d a 2 a a 1 c s e a ting pl a ne 0.10 mm 0.004" c c l 1 l q g au ge pl a ne s e a ting pl a ne 0.25 mm dim millimeters inches min max min max a 0.89 1.12 0.0 3 5 0.044 a 1 0.01 0.10 0.0004 0.004 a 2 0.88 1.02 0.0 3 46 0.040 b 0. 3 5 0.50 0.014 0.020 c 0.085 0.18 0.00 3 0.007 d 2.80 3 .04 0.110 0.120 e 2.10 2.64 0.08 3 0.104 e 1 1.20 1.40 0.047 0.055 e 0.95 bsc 0.0 3 74 ref e 1 1.90 bsc 0.0748 ref l 0.40 0.60 0.016 0.024 l 1 0.64 ref 0.025 ref s 0.50 ref 0.020 ref q 3 8 3 8 ecn: s-0 3 946-rev. k, 09-jul-01 dwg: 5479
an807 vishay siliconix document number: 70739 26-nov-03 www.vishay.com 1 mounting little foot sot-23 power mosfets wharton mcdaniel surface-mounted little foot power mosfets use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. see application note 826, recommended minimum pad patterns with outline drawing access for vishay siliconix mosfet s, ( http://www.vishay.com/doc?72286 ), for the basis of the pad design for a littl e foot sot-23 power mosfet footprint . in converting this footprint to the pad set for a power device, designers must make tw o connections: an electrical connection and a thermal connection, to draw heat away from the package. the electrical connections for the sot-23 are very simple. pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. as in the other little foot packages, the drai n pin serves the additional function of providing the thermal connection from the package to the pc board. the total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. also, heat spreads in a circular fashion from the heat source. in this case the drain pin is the heat source when looking at heat spread on the pc board. figure 1 shows the footprint with copper spreading for the sot-23 package. this pattern shows the starting point for utilizing the board area available for the heat spreading copper. to create this pattern, a plane of copper over lies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the ambient air. this pattern uses all the available area underneath the body for this purpose. figure 1. footprint with copper spreading 0.114 2.9 0.059 1.5 0.0394 1.0 0.037 0.95 0.150 3.8 0.081 2.05 since surface-mounted packages are small, and reflow soldering is the most common way in whic h these are affixed to the pc board, ?thermal? connections from the planar copper to the pads have not been used. even if additional planar copper area is used, there should be no problems in the soldering process. the actual solder connections are defined by the solder mask openings. by combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. a final item to keep in mind is the width of the power traces. the absolute minimum power trace width must be determined by the amount of current it has to carry. for thermal reasons, this minimum width should be at least 0.020 inches. the use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device.
application note 826 vishay siliconix document number: 72609 www.vishay.com revision: 21-jan-08 25 application note recommended minimum pads for sot-23 0.106 (2.692) recommended mi nimum pads dimensions in inches/(mm) 0.022 (0.559) 0.049 (1.245) 0.029 (0.724) 0.037 (0.950) 0.053 (1.341) 0.097 (2.459) return to index return to index
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.
|
